Ever wrote PowerPC inline assembly with GCC, and wondered why certain code combinations don’t run? Do you see what’s wrong with this code?
uint64_t ld(volatile void *addr)
asm volatile (“ld %0, 0(%1)” : “=r” (l) : “r” (addr));
Well, it’s using the “r” register constraint, and GCC might choose r0 for you. However, some instructions (like load instructions) will use a literal 0 if you specify r0, because that let’s you do zero-page addressing. So you need to tell GCC to not use r0 in this case, but any other register.
It doesn’t seem to be documented. It can’t be found easily on google. It’s “b”.